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ARMSim# was developed as an effective simulator for the ARM processor to be used initially as a tool in academia, both for teaching and for research. It is similar in spirit to the SPIM software for the MIPS architecture. ARMSim# has been expanded to include features not normally found in such applications, such as cache simulation, detailed timing information and extensions to the ISA and user interface.

ARMSim# has been first tested and used extensively in an introductory course to architecture in a Computer Science department. It can also be used in more advanced architecture courses, where programming and simulating a processor are part of the scope of learning. The attached interactive graphic views of peripherals, with interrupts enabled, provide also an excellent platform for the simulation of embedded systems.

Similar to the SPIM software, ARMSim# has a built in assembler that assembles and links the user code directly when loaded. ARMSim# can also load and link to object files and libraries that have been pre-built allowing the user to utilize code from other sources, such as the C runtime libraries.

An important improvement available in ARMSim# is the ability to extend its functionality through the use of plugins. New hypothetical instructions can be implemented and tested in simulation. Hardware can be simulated by intercepting the accesses to the memory map and this hardware can be visualized through the user interface extensions. The main example is a plugin that simulates the Embest S3CEV40 development board for ARM. It simulates the major components of the board such as the LED's, buttons, LCD screen, keyboard and Eight segment display. Users can write code targeting the development board and simulate this code in ARMSim# before deploying. ARMSim# is available for download, together with several other plugins including a full hardware board view (emulating an Embest board) with many peripherals, a traffic light and an eight-segment display.

ARMSim# has been developed by members of the Department of Computer Science at the University of Victoria, in Victoria, British Columbia, Canada. It is distributed free for academic use. For commercial use, please contact the authors.